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M2i Clock Setup Granularity and Accuracy

The M2i series has a powerful clock generation unit that allows to select different internal and external clock modes with the help of low jitter PLLs and additional dividers. This results in a lot of different regulations to determine and setup a valid sampling clock. All calculations and checks are done internally in the driver allowing to just set a desired clock and read the clock that is found by the driver ot be the nearest matching clock. If you want to check for certain clock rates before purchasing a card, the easiest way would be to either install a demo card and check for your clock rate manually or ask our support team whether a certain clock is supported.

This article explains the figures found in the data sheet and helps to interpret them:

Clock Setup Granularity

This information is valid for all internal PLL clock mode as well as external reference clock mode. As the clock is programmed using a PLL and some dividers there is no fixed granularity (stepsize) like 1 kHz that is valid for the complete range but there is an entry in the data sheet that reads:

Internal clock setup granularity: ?1% of range (100M, 10M, 1M, 100k,...): Examples: range 1M to 10M: stepsize ? 100k

In this figure the complete clock setup range is splitted in smaller sub-ranges and in each sub-range you can at least program the clock with a granularity of 1%. Let's look at a simple example: you want to set a clock around 10 MHz:

  • for the range from 1 MHz to 10 MHz the granularity is 1% of 10 MHz = 100 kHz
  • for the range from 10 MHz to 100 MHz the granularity is 1% of 100 MHz = 1 MHz

Looking around the 10 MHz you can be sure that clocks of .., 9.700 MHz, 9.800 MHz, 9.900 MHz, 10 MHz, 11 MHz, 12 MHz, ... are possible to be programmed. But the figure from the data sheet is something like a minimum granularity that is guaranteed. There are plenty more clock settings available in between these minimum range. To see these possible clock settings it is necessary to let the software driver do the calculation as explained above.

Clock Accuracy

The clock accuracy is another important figure that is found in the data sheet. The accuracy specified here is based on the internal reference clock and gives the maximum possible clock error when programming an internal clock (both PLL and Quartz clock mode)

A accuracy of 20 ppm (parts per million) for a 10 MHz sampling clock would mean that the real sampling clock is somewhere between [10 MHz - 20 ppm] and [10 MHz + 20 ppm]  what is the range of 9.9999800 MHz to 10.000200 MHz.

As the clock accuracy is based on the reference clock feeding in an external reference clock with a higher accuracy would also result in a better sampling clock accuracy. The internal clock devive won't add additional frequency errors to the sampling clock.



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