Back
Version 1.23 of 26th September 2016
- [FW-272] Bug-FIx: internal Clock-Enable signal not properly generated and start command is not recognized when oversampling down from CkSH slower than CkCfg
- [FW-222] Bug-FIx: M4i: Sync trigger jitter and wrong position with starhub mounted on Base with PCB V1.0
- [FW-330] Improvement: Allow output of system clock (divided sample clock) for multi-purpose I/O lines
- [FW-258] New Feature: Add PXIe support to base logic
- [FW-320] Improvement: Change burst write rate for on-board memory to beyond resonance frequency of 22kHz of some power PI filters
- [FW-323] Improvement: Improve timing accuracy of trigger and armed output of X0, X1, X2 lines
- [FW-306] Improvement: Additional registers to allow storage of re-sort parameters for ABA separately from Timestamps
- [FW-276] Improvement: Better logic optimization due to different trigger mode encoding