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SBench 6 - Clock Settings | Spectrum

Overview

General Information

Short information about SBench 6. Overview about the covered application areas

Hardware Support

Cards and Features

Requirements

Supported operating systems and hardware requirements

FAQ

Frequently asked questions for license, installation and features

Licences

Available Versions: Base, Professional and Demo Versions

Setup

Project Organization

All settings, data files, calculations and report templates are organized in project folders

Inputs

Ranges, Termination, Filters, AC/DC, Custom Units, Sensors

Modes

Singleshot, Segmented, Streaming Mode, Sample or Time based

Trigger

Trigger Sources, OR/AND conjunction, Analog and Digital Trigger

Clock

Clock Modes and Sample Scaling

Timestamps

Timestamps and connection with GPS or IRIG-B receivers

Streaming Mode

High Speed Streaming with different file formats and split function

Displays

Analog Display

Powerful scope like view of analog signals with multiple axis and versatile functions

Segmented View

Views segmented data with timestamps, ABA data and special jump functions

Digital Data Display

Logic analyzer view for single signals and bus signals with search functions

Streaming Display

Data online view and fast hard disk streaming

X/Y Display

Lissajous style plots, one x-axis and multiple y-axis for analog signals

FFT Display

Frequency domain view with harmonics cursors and analysis functions SNR, THD, ...

Spread Display

Stacked display of multiple signals with easy scaling

History Mode

Signal history, Eye diagram

Analysis

Cursor

Two independant cursors for easy measurings with signal locking

Measurement

Data analysis or simple measurements

Filters

Powerful FIR filters with automatic and manual coefficients

Function Generator

Formula interpreter with several operators and source signals

Documentation

Export

Different export formats supported: ASCII, Binary, MATLAB, WAVE, VCD

Comments

Comments directly inside the displays locked to display or signal

Reports

Comfortable report editor with support of all display, setup and calculation components from SBench 6

Printout/Screenshot

Printouts or screenshots for further documentation, different information can be added

Clock Settings

SBench 6 Clock SetupThe sampling clock is the basic setting for the acquisition and signal generation. All clock modes of the hardware can be selected here. Sampling clock can either be entered in Hertz (Hz) or as the time interval between two samples. A simple click on the Clock/Time button changed between the two different input modes.

Settings are adjusted automatically to the best matching and nearest value taking the possibilities of the hardware into account.

If using an external sampling clock this setup dialog defines the sampling interval for the displayed signals.

Synchronization and divided sampling clock

SBench 6 Synchronization Clock SetupWhen using several synchronized casrds SBench 6 offers - if supported by the hardware - to use them with different clocks where the slave cards get a divided master clock for sampling. This allows mixed sampling frequencies to have fast channels and slow channels in one system, still synchronized by the master clock.

The standard setup is a synchronized clock for all cards with no needs to do additional setup. All channels run with the same speed with no skew between them.

Contact Information