Increased sensitivity option for all fast 8 bit digitizers | Spectrum
The modular way that we design and build our products means that we can provide this front-end option very easily as a new daughter board within the 22xx range. Matching the digitizer’s range to the signal under test is important as it ensures maximum dynamic range as well as better measurement accuracy and resolution. For example, if a signal only covers half of a digitizer’s selected full scale range then only half of the digitizer’s available analog-to-digital converter (ADC) resolution can used. Smaller, or lower level, signals will use even less of the ADC's capabilities and further reduce the digitizer’s overall signal-to-noise performance. This new option lets users select more sensitive, full scale ranges so that, even for low amplitude signals, the ADC's complete dynamic range is available.
A 10-bit digitizer, for example, with a lowest 50 Ω range at ±0.5 V full scale input range that has to acquire a signal with an amplitude of around 50 mV. The 10-bit ADC offers 1024 (210) levels of resolution each of about 1 mV (1V/1024). The signal would therefore only cover about 50 levels of the 10-bit ADC's available range. Spectrum’s 22xx series digitizers use 8-bit ADCs that give 256 (28) levels of resolution. So, by using this new low range option, the digitizer becomes more sensitive with around 0.3 mV (80mV/256) of resolution capturing the 50 mV signal with around three times more resolution than the more expensive 10-bit unit.
Spectrum's 22xx series digitizers come in a variety of popular form factors including PCIe, PXIe and LXI. Models are available with sampling rates of 1.25, 2.5 and 5 GS/s and bandwidths of 500 MHz or 1.5 GHz (700 MHz with low input range option). Versions with one, two and four channels are available for units in the PCIe and PXIe formats, while the larger LXI-based instruments offer models that have from 2 to 24 fully synchronous channels.
All Spectrum digitizers are designed so that each channel features its own ADC, large acquisition memory (1 GSample/channel) and independent, front-end, signal conditioning circuitry. The ADCs are clocked synchronously to ensure inter-channel timing measurements can be made with the best possible accuracy as well as maintaining a constant phase relationship. The combination of fast sampling rate, wide bandwidth and long acquisition memory enables the digitizers to capture long, complex, high frequency signals. It also makes it possible to characterize and measure fast events that go down into the nano- and sub-nanosecond timing ranges.